1. Field of the Invention
The present invention relates to a differential amplifier and an offset cancellation circuit, more particularly to a technology for making an accurate voltage deliver rapid and low-impedance drive performance. The present invention is preferably applied to, for example, a liquid crystal or organic EL display device in which a liquid crystal display driver or an organic EL driver is installed.
2. Description of the Related Art
Operational amplifiers are conventionally often used to amplify analog signals and difference signals. An operational amplifier is an elementary circuit and a large number of operational amplifiers are incorporated in, for example, LSI. An output signal of an operational amplifier includes an error resulting from the variability in characteristics of transistors constituting the operational amplifier. Because of the error thus generated, in the operational amplifier, an input signal, for example, 0V, does not necessarily become an output signal 0V. The error of the output signal with respect to the input signal is called an offset voltage.
Conventionally, various measures were taken for operational amplifiers, such as optimized circuit designs and layout designs of a differential amplifier and an active load, in order to reduce the offset voltage (for example, see Non-Patent Literature (“ANALOG INTEGRATED CIRCUIT DESIGN” written by DAVID A. JOHS and KEN MARTIN, P. 105-P. 118, P. 229-P. 231, JOHN WILLY & SONS, INC, 1997).
However, the combination of the before-mentioned design techniques, without an offset cancellation function for canceling the offset voltage, has its limitation in reducing the offset voltage.
Below is described what causes the generation of the offset voltage in the operational amplifier. There are two types of offset voltages, which are a systematic offset voltage and a random offset voltage. The systematic offset voltage, which is induced by a manufacturing process for the circuit or layout per se, can be controlled by adopting the design techniques described earlier.
However, a main cause of the random offset voltage is the variability of transistor characteristics which occurs with a certain probability in a semiconductor manufacturing process. Therefore, it is extremely difficult to reduce the random offset voltage by merely adjusting the circuit and layout designs in the operational amplifier. Therefore, it is an effective way to provide an offset cancellation function in the operational amplifier or a buffer circuit so as to deal with the random offset voltage as well.
Examples of an offset cancellation circuit provided with the offset cancellation function include the first offset cancellation circuit recited in No. 2004-350256 of the Japanese Patent Applications Laid-Open and the second offset cancellation circuit recited in No. 2005-117547A of the Japanese Patent Applications Laid-Open.
As illustrated in FIG. 13, the first offset cancellation circuit comprises an operational amplifier, a capacitor and switches, wherein a voltage corresponding to an offset voltage is stored in the capacitor, and a computing process is performed for the stored voltage and an input voltage of the operational amplifier, so that the offset voltage is reduced.
As illustrated in FIG. 14, the second offset cancellation circuit comprises first and second differential amplifiers, a capacitor, and switches. According to the constitution, the same voltage is applied to two inputs of the first differential amplifier, and the capacitor is connected to two inputs of the second differential amplifier, and then, the first differential amplifier is operated by a voltage follower. Then, voltages to be supplied to the two inputs of the second differential amplifier are set such that: the input voltage is supplied to one of them; and an open state is set in the other (voltage stored in the capacitor is inputted thereto). Then, the second differential amplifier is switched to the voltage follower.
The first and second offset cancellation circuits have the following problems. In the first offset cancellation circuit, because charges stored in the capacitor vary via a parasitic capacitance when the switches are opened and closed, the variation of the charges appears as the offset voltage. What needs to be done in order to reduce the influences of the variation of charges is that a capacitance of the capacitor is increased so that the parasitic capacitance is apparently reduced. However, the increase of the capacitance of the capacitor leads to the increase of a chip size and makes it necessary to extend a time period during which the offset voltage is stored. The offset storage time period is determined by the product of a resistance value of the switch in a conducting state and a capacitance value of the capacitor. When the capacitance value of the capacitor is set to be larger in order to deal with the offset problem, therefore, a processing rate is consequently lowered.
In the second offset cancellation circuit, since the first differential amplifier operates even while the offset voltage is being cancelled, the voltage can still be outputted from the operational amplifier (more specifically, the first differential amplifier) during the offset cancellation period. However, the offset voltage is added to the voltage outputted from the operational amplifier in that case. When the second differential amplifier starts to operate, the output voltage in which the offset voltage is reduced can be outputted, and an accurate voltage can be rapidly outputted. The first differential amplifier provided so as to reduce the offset voltage, however, has the following three disadvantages.
One of the disadvantages is described below. As described, two differential amplifiers constitute the operational amplifier, which can be inherently comprised of a single differential amplifier. Therefore, a required area and a required volume of current are simply doubled. The second disadvantage is that such an area increase invites the increase of costs.
In the case where the constitution of the second offset cancellation circuit is adopted in a liquid crystal driver or an organic EL driver, it is necessary to provide such constitution for each of scanning lines. As a result, the number of the operational amplifiers to be further provided will be as many as approximately 400-1,000, and influences of the increase in the area and current consumption of one operational amplifier will increase by at least 400 times on the whole. Such enormous influences are never ignorable in a display device used in a liquid crystal television, an organic EL television, and the like.
The third disadvantage is described below. Even if the variability of the characteristics of the transistors constituting the second differential amplifier due to a manufacturing process does not exist, the variability of the characteristics of the transistors constituting the first differential amplifier may exist. When such variability exists, the offset voltage which would not occur in the absence of the second offset cancellation circuit is unnecessarily added.
As so far described, the processing rate is increased, and the output voltage can be made more accurate by the second offset cancellation circuit. However, the reduction of the required area, power consumption, manufacturing costs and the like is still an issue yet to be solved.